The present invention relates generally to clock-synchronizing techniques, and in particular, to an improved method and arrangement for generating Program Clock Reference values (PCRS) in MPEG bitstreams.
In MPEG, all audio, video, and auxiliary information to be carried within a given data channel is divided into 188 byte long transport packets. Each transport packet is subdivided into a header and a payload. The header may carry information to identify the type of data that is carried within the payload and information required to decode the transport packet stream. A field may be provided within the header with a set of flags to indicate the presence of optional fields, one of which may be a Program Clock Reference (PCR) value. The PCR is a 42-bit value that represents time stamps from a relative system time clock (STC) that is clocked by a periodic signal which is typically 27 MHz within an MPEG encoder. Of the 42 bits, the first 33 bits of the PCR are called the PCR base, and express a value of the encoder system time clock in 90 kHz periods. The remaining nine bits of the PCR value are referred to as the PCR extension, and express a value of the system time clock in 27 MHz periods.
An example of use of this method is in an MPEG encoder. The PCR values within the transport stream produced by the MPEG encoder are used to accurately recover the encoder clock in the MPEG decoder. Accurate synchronization must be maintained between the encoder system time clock and the decoder system time clock in order to properly decode the audio and the video data. The transport stream may be provided with presentation time-stamps (PTSs) to indicate to the MPEG decoder when to present the individual video and audio data frames to the user. The value of each PTS is ultimately dictated by the frequency of the encoder clock in the encoder, which clocks a system time clock in the MPEG encoder. When encoding the data, the MPEG encoder inserts the PTSs into the transport stream based on samples of the system time clock. The decoder clock in the MPEG decoder therefore operates at the same frequency as the encoder clock.
To synchronize the MPEG decoder clock with the MPEG encoder clock, the MPEG standard suggests that the PCR values be used to implement a clock recovery system. U.S. Pat. No. 5,699,392 illustrates an MPEG suggested architecture for a clock recovery system.
To maintain synchronization, a phase-locked loop may be provided in the clock recovery system. For an MPEG transport stream, a voltage controlled oscillator operates at a nominal oscillation frequency of 27 MHz and has a control input allowing the oscillation frequency to be varied proportionally to input control voltage. That is, the frequency of the oscillator may be adjusted within a small range surrounding the 27 MHz nominal frequency. Application of the control signal to the voltage controlled oscillator therefore increases or decreases the oscillation frequency of the voltage controlled oscillator to adjust the frequency towards the oscillation frequency of the clock within the encoder.
As discussed in U.S. Pat. No. 5,699,392, the MPEG standard suggests an architecture for recovering the encoder clock from the PCR values contained in the transport stream.
It is therefore desirable to develop a PCR generator construction for, and a method of generating PCRs in an MPEG encoder in a simple yet effective manner that eliminates the need for expensive components presently necessary in state of the art PCR generator constructions. By constructing such an arrangement, a minimum amount of hardware is required thereby minimizing the cost of the overall system and allowing the system to be more advantageously mass produced. The PCR generator disclosed herein achieves the aforementioned and below mentioned objectives.